Author: Gou, S.Z.
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TUPHA082 The Timing System of HIRFL-CSR 601
  • W. Zhang, S. An, S.Z. Gou, K. Gu, P. Li, Y.J. Yuan, M. Yue
    IMP/CAS, Lanzhou, People's Republic of China
  This article gives a brief description of the timing system for Heavy Ion Research Facility in Lanzhou- Cooler Storage Ring (HIRFL-CSR). It introduces in detail mainly of the timing system architecture, hardware and software. We use standard event system architecture. The system is mainly composed of the events generator (EVG), the events receiver (EVR) and the events fan-out module. The system is the standard three-layer structure. OPI layer realizes generated and monitoring for the events. The intermediate layer is the events transmission and fan out. Device control layer performs the interpretation of the events. We adopt our R&D EVG to generate the events of virtual accelerator. At the same time, we have used our own design events fan-out module and realize distributed on the events. In equipment control layer, we use EVR design based on FPGA to interpret the events of different equipment and achieve an orderly work. The Timing System realize the ion beam injection, acceleration and extraction.  
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