Author: Renaud, G.
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TUAPL05 PandABox: A Multipurpose Platform for Multi-technique Scanning and Feedback Applications 143
  • S. Zhang, Y.-M. Abiven, J. Bisou, F. Langlois, G. Renaud, F. Ta, G. Thibaux
    SOLEIL, Gif-sur-Yvette, France
  • M.G. Abbott, T.M. Cobb, C.J. Turner, I.S. Uzun
    DLS, Oxfordshire, United Kingdom
  • S.M. Minolli
    NEXEYA Systems, La Couronne, France
  PandABox is a development project resulting from a collaboration between Synchrotron SOLEIL and Diamond Light Source started in October 2015. The initial objective driving the project was to provide multi-channel encoder processing for synchronizing data acquisitions with motion systems in experimental continuous scans. The resulting system is a multi-purpose platform well adapted for multi-technique scanning and feedback applications. This flexible and modular platform embeds an industrial electronics board with a powerful Xilinx Zynq 7030 SoC (Avnet PicoZed), FMC slot, SFP module, TTL and LDVS I/Os and removable encoder peripheral modules. In the same manner, the firmware and software framework has been developed in a modular way to be easily configurable and adaptable. The whole system is open and extensible from the hardware level up to integration with control systems like TANGO or EPICS. This paper details the hardware capabilities, platform performance, framework adaptability, and the project status at both sites.
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THMPA09 MACUP (Material for data ACquisition - UPgrade): Project Focusing on DAQ Hardware Architecture Upgrades for SOLEIL 1330
  • G. Renaud, Y.-M. Abiven, F. Ta, Q.H. Tran, S. Zhang
    SOLEIL, Gif-sur-Yvette, France
  Since operation-startup more than 10 years ago, Synchrotron SOLEIL has chosen acquisition architectures that are mainly based on CompactPCI systems. The last few years there has however been an acceleration of obsolescence issues on the CPCI products and it has also been identified that this technology would become a bottleneck in terms of performance for new projects. The MACUP project was therefore created with two main objectives: maintaining the current facility operations by addressing the hardware obsolescence risks, all while searching for alternate high-performance solutions with better embedded processing capabilities to face new challenging requirements. One additional guideline for the project is to facilitate collaborative work for accelerator and beamline projects by evaluating and standardizing a limited set of technologies like the Xilinx ZYNQ SOC, VITA 57 FMC and μTCA standards. This paper describes the adopted methodologies and roadmap to drive this project.  
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