Timing and Synchronization
Paper Title Page
TUCPL01 Refurbishment of the ESRF Accelerator Synchronization System Using White Rabbit 224
  • G. Goujon, A. Broquet, N. Janvier
    ESRF, Grenoble, France
  The ESRF timing system, dating from the early 90's and still in operation, is built around a centralized RF driven sequencer distributing synchronization signals along copper cables. The RF clock is broadcasted over a separate copper network. White Rabbit, offers many attractive features for the refurbishment of a synchrotron timing system, the key one being the possibility to carry RF over the White Rabbit optical fiber network. CERN having improved the feature to provide network-wide phase together with frequency control over the distributed RF, the whole technology is now mature enough to propose a White Rabbit based solution for the replacement of the ESRF system, providing flexibility and accurate time stamping of events. We describe here the main features and first performance results of the WHIST module, an ESRF development based on the White Rabbit standalone SPEC board embedding the White Rabbit protocol and a custom mezzanine (DDSIO) extending the FMC-DDS hardware to provide up to 12 programmable output signals. All WHIST modules in the network run in phase duplicates of a common RF driven sequencer. A master module broadcasts the RF and the injection trigger.  
video icon Talk as video stream: https://youtu.be/Ege_6IGHNPU  
slides icon Slides TUCPL01 [1.595 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUCPL01  
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TUCPL02 Synchronized Timing and Control System Construction of SuperKEKB Positron Damping Ring 229
  • H. Sugimura, K. Furukawa, H. Kaji, F. Miyahara, T.T. Nakamura, Y. Ohnishi, S. Sasaki, M. Satoh
    KEK, Ibaraki, Japan
  The KEK electron/positron injector chain delivers beams for particle physics and photon science experiments. A damping ring has been constructed at the middle of the linac to generate a positron beam with sufficiently low emittance to support a 40-fold higher luminosity in the SuperKEKB asymmetric collider over the previous project of KEKB, in order to increase our understanding of flavour physics. A timing and control system for the damping ring is under construction to enable the timing synchronization and beam bucket selection between the linac, the positron damping ring and the SuperKEKB main ring. It should manage precise timing down to several picoseconds for the beam energy and bunch compression systems. Besides precise timing controls to receive and transmit positron beams, it has to meet local analysis requirements in order to measure beam properties precisely with changing the RF frequency. It is incorporating the event timing control modules from MRF and SINAP.  
video icon Talk as video stream: https://youtu.be/BMAJimbEQB4  
slides icon Slides TUCPL02 [0.482 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUCPL02  
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White Rabbit in Radio Astronomy  
  • E.P. Boven
    JIVE, Dwingeloo, The Netherlands
  The Square Kilometre Array (SKA) is a new radio telescope that is currently being designed. It will consist of two interferometric antenna arrays, one in South Africa and one in Australia, which together will cover a frequency span of 50 MHz to 13.8 GHz. Our design for the timing synchronization of all the receivers in these arrays uses White Rabbit to distribute absolute time. This talk will discuss how we will provide synchronization on these long distances, in the rather challenging climatic conditions of the semi-desert sites chosen for the SKA telescopes, and the improvements to WR we implemented for that. Very Long Baseline Interferometry (VLBI) is an instrumental method in radio astronomy where radio telescopes distributed all over the globe carry out observations simultaneously, and through aperture synthesis operate as a single radio telescope. As the resolution of such an instrument scales with the longest baseline between stations, global VLBI provides unsurpassed resolution in astronomy. In the ASTERICS project, we are demonstrating how White Rabbit can be used to distribute a coherent frequency reference for VLBI on public, shared fiber.  
video icon Talk as video stream: https://youtu.be/bisES3VNN7M  
slides icon Slides TUCPL03 [4.277 MB]  
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TUCPL04 SwissFEL Timing System: First Operational Experience 232
  • B. Kalantari, R. Biffiger
    PSI, Villigen PSI, Switzerland
  The SwissFEL timing system builds on MRF's event system products. Performance and functional requirements have pushed MRF timing components to its newest generation (300 series) providing active delay compensation, conditional sequence events, and topology identification among others. However, employing available hardware functionalities to implement complex and varying operational demands and provide them in the control system has its own challenges. After a brief introduction to the new MRF hardware this paper describes operational aspects of the SwissFEL timing and related control system applications. We describe a new technique for beam rate control and how this scheme is used for the machine protection system (MPS). We show how a well thought modular software-side design enables us to maintain various rep rates across the facility and allows us to implement complex triggering patterns with minimum development effort. We also discuss our timestamping method and its interface to the beam synchronous data acquisition system. Further we share our experience in timing network installation, monitoring and maintenance issues during commissioning phase of the facility.  
video icon Talk as video stream: https://youtu.be/CWx8QBpSxXc  
slides icon Slides TUCPL04 [5.381 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUCPL04  
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Design and Prototyping of a New Synchronization System with Stability at Femtoseconds  
  • M. Liu, X.L. Dai, C.X. Yin
    SINAP, Shanghai, People's Republic of China
  We present the design and prototyping of a new synchronization system with high stability. Based on a continuous-wave laser, the RF reference and the timing events are transmitted along the same optical fiber at femtoseconds. Therefore, the system could reutilize the existing fiber optic network of the event timing system around large accelerator facilities. The phase drift of the signal is detected based on Michelson interference and is then compensated with optical methods. The dispersion drift is corrected by appropriative dispersion compensating fiber. The system design and the test results in the lab are demonstrated in the paper.  
video icon Talk as video stream: https://youtu.be/xgjL-mg9YLM  
slides icon Slides TUCPL05 [3.503 MB]  
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TUCPL06 Verification of the FAIR Control System Using Deterministic Network Calculus 238
  • M. Schütze, S. Bondorf
    DISCO, Kaiserslautern, Germany
  • M. Kreider
    GSI, Darmstadt, Germany
  • M. Kreider
    Glyndŵr University, Wrexham, United Kingdom
  Funding: Carl Zeiss Foundation
The FAIR control system (CS) is an alarm-based design and employs White Rabbit time synchronization over a GbE network to issue commands executed accurate to 1 ns. In such a network based CS, graphs of possible machine command sequences are specified in advance by physics frameworks. The actual traffic pattern, however, is determined at runtime, depending on interlocks and beam requests from experiments and accelerators. In 'unlucky' combinations, large packet bursts can delay commands beyond their deadline, potentially causing emergency shutdowns. Thus, prior verification if any possible combination of given command sequences can be delivered on time is vital to guarantee deterministic behavior of the CS. Deterministic network calculus (DNC) can derive upper bounds on message delivery latencies. This paper presents an approach for calculating worst-case descriptors of runtime traffic patterns. These so-called arrival curves are deduced from specified partial traffic sequences and are used to calculate end-to-end traffic properties. With the arrival curves and a DNC model of the FAIR CS network, a worst-case latency for specific packet flows or the whole CS can be obtained.
video icon Talk as video stream: https://youtu.be/t1AXzTi8kJA  
slides icon Slides TUCPL06 [0.203 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUCPL06  
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TUMPL04 LCLS-II Timing Pattern Generator Configuration GUIs 307
  • C. Bianchini, J. Browne, K.H. Kim, P. Krejcik, M. Weaver, S. Zelazny
    SLAC, Menlo Park, California, USA
  The LINAC Coherent Light Source II (LCLS-II) is an upgrade of the SLAC National Accelerator Laboratory LCLS facility to a superconducting LINAC with multiple destinations at different power levels. The challenge in delivering timing to a superconducting LINAC is dictated by the stability requirements for the beam power and the 1MHz rate. A timing generator will produce patterns instead of events because of the large number of event codes required. The poster explains how the stability requirements are addressed by the design of two Graphical User Interfaces (GUI). The Allow Table GUI filters the timing pattern requests respecting the Machine Protection System (MPS) defined Power Class and the electron beam dump capacities. The Timing Pattern Generator (TPG) programs Sequence Engines to deliver the beam rate configuration requested by the user. The low level program, The TPG generates the patterns, which contains the timing information propagated to the Timing Pattern Receiver (TPR). Both are implemented with an FPGA solution and configured by EPICS. The poster shows an overall design of the high-level software solutions that meet the physics requirements for LCLS-II timing.  
slides icon Slides TUMPL04 [1.030 MB]  
poster icon Poster TUMPL04 [0.883 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUMPL04  
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TUPHA082 The Timing System of HIRFL-CSR 601
  • W. Zhang, S. An, S.Z. Gou, K. Gu, P. Li, Y.J. Yuan, M. Yue
    IMP/CAS, Lanzhou, People's Republic of China
  This article gives a brief description of the timing system for Heavy Ion Research Facility in Lanzhou- Cooler Storage Ring (HIRFL-CSR). It introduces in detail mainly of the timing system architecture, hardware and software. We use standard event system architecture. The system is mainly composed of the events generator (EVG), the events receiver (EVR) and the events fan-out module. The system is the standard three-layer structure. OPI layer realizes generated and monitoring for the events. The intermediate layer is the events transmission and fan out. Device control layer performs the interpretation of the events. We adopt our R&D EVG to generate the events of virtual accelerator. At the same time, we have used our own design events fan-out module and realize distributed on the events. In equipment control layer, we use EVR design based on FPGA to interpret the events of different equipment and achieve an orderly work. The Timing System realize the ion beam injection, acceleration and extraction.  
poster icon Poster TUPHA082 [0.394 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA082  
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TUPHA083 The TimIQ Synchronization for Sub-Picoseconds Delay Adjustment 604
  • J.P. Ricaud, N. Hubert, M. Labat, C. Laulhé
    SOLEIL, Gif-sur-Yvette, France
  • H. Enquist
    MAX IV Laboratory, Lund University, Lund, Sweden
  • C. Laulhé
    Université Paris-Saclay, Saint-Aubin, France
  Synchrotron facilities provides short, regular and high frequency flashes of light. These pulses are used by the scientific community for time resolved experiments. To improve the time resolution, demands for always shorter X-ray pulses are growing. To achieve this goal, Synchrotron SOLEIL and MAX IV laboratory have developed special operating modes such as low-alpha and femtoslicing, as well as a single pass linear accelerator. For the most demanding experiments, the synchronization between short light pulses and pump-probe devices requires sub-picoseconds delay adjustment. The TimIQ system has been developed for that purpose. It is a joint development between Synchrotron Soleil and MAX IV Laboratory. It is aimed to be used on three beamlines at Soleil and one at MAX IV. Based on IQ modulation technics, it allows shifting a radio frequency clock by steps of #100 fs. This paper is a description of this system and of its performances.  
poster icon Poster TUPHA083 [1.727 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA083  
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TUPHA084 Decoupling CERN Accelerators 608
  • A. Dworak, J.C. Bau
    CERN, Geneva, Switzerland
  The accelerator complex at CERN is a living system. Accelerators are being dismantled, upgraded or change their purpose. New accelerators are built. The changes do not happen overnight, but when they happen they may require profound changes across the handling systems. Central timings (CT), responsible for sequencing and synchronization of accelerators, are good examples of such systems. This paper shows how over the past twenty years the changes and new requirements influenced the evolution of the CTs. It describes experience gained from using the CBCM CT model, for strongly coupled accelerators, and how it led to a design of a new Dynamic Beam Negotiation (DBN) model for the AD and ELENA accelerators, which reduces the coupling, increasing accelerator independence. The paper ends with an idea how to merge strong points of both models in order to create a single generic system able to efficiently handle all involved CERN accelerators and provide more beam time to experiments and LHC.  
poster icon Poster TUPHA084 [0.477 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA084  
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TUPHA086 Timing System Upgrade for Top-off Operation of HLS-II 612
  • C. Li, J.L. Li, W. Li, G. Liu, J.G. Wang, L. Wang, W. Xu, K. Xuan
    USTC/NSRL, Hefei, Anhui, People's Republic of China
  The Hefei Light Source II (HLS-II) is a vacuum ultravi-olet (VUV) synchrotron light source. A major upgrade of the light source was finished in 2014, and the timing system was rebuilt with event-system to meet synchroni-zation requirements of the machine. The new timing system provides about 100 output signals with various interfaces. The time resolution of this system is 9.8 ns for most devices and 9 ps for the electron gun and the injec-tion kickers. The measured jitter of the output signal is less than 27 ps (RMS). In order to improve the perfor-mance of light source, the top-off operation mode has been planned. As part of this plan, both the hardware and the software of the timing system are upgraded. By ob-taining real-time data of beam measurement of storage ring, the automatic selection of the bucket is implement-ed. With any designated bunch pattern, top-off injection is achieved, and the storage ring beam can be uniform filled well.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA086  
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TUPHA087 The Timing Diagram Editing and Verification Method 615
  • G.A. Fatkin, A.I. Senchenko
    BINP SB RAS, Novosibirsk, Russia
  • G.A. Fatkin, A.I. Senchenko
    NSU, Novosibirsk, Russia
  Preparation and verification of the timing diagrams for the modern complex facilities with diversified timing systems is a difficult task. A mathematical method for convenient editing and verification of the timing diagrams is presented. This method is based on systems of linear equations and linear inequalities. Every timing diagram has three interconnected representations: a textual equation representation, a matrix representation and a graph (tree) representation. A prototype of software using this method was conceived in Python. This prototype allows conversion of the timing data between all three representations and its visualization.  
poster icon Poster TUPHA087 [2.162 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA087  
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TUPHA088 Timing System at ESS 618
  • J. Cereijo García, T. Korhonen, J.H. Lee
    ESS, Lund, Sweden
  The European Spallation Source (ESS) timing system is based on the hardware developed by Micro-Research Finland (MRF). The main purposes of the timing system are: generation and distribution of synchronous clock signals and trigger events to the facility, providing a time base so that data from different systems can be time-correlated and synchronous transmission of beam-related data for for different subsystems of the facility. The timing system has a tree topology: one Event Generator (EVG) sends the events, clocks and data to an array of Event Receivers (EVRs) through an optical distribution layer (fan-out modules). The event clock frequency for ESS will be 88.0525 MHz, divided down from the bunch frequency of 352.21 MHz. An integer number of ticks of this clock will define the beam macro pulse full length, around 2.86 ms, with a repetition rate of 14 Hz. An active delay compensation mechanism will provide stability against long-term drifts. A novelty of ESS compared to other facilities is the use of the features provided by EVRs in uTCA form factor, such as trigger and clock distribution over the backplane. These EVRs are already being deployed in some systems and test stands.  
poster icon Poster TUPHA088 [3.033 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA088  
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TUPHA090 TiCkS: A Flexible White-Rabbit Based Time-Stamping Board 622
  • C. Champion, S. Colonges, R. Oger, M. Punch
    Laboratoire APC, Paris, France
  • Y. Moudden
    CEA/DRF/IRFU, Gif-sur-Yvette, France
  • M. Punch
    Linnaeus University, Växjö, Sweden
  We have developed the TiCkS board based on the White Rabbit (WR) SPEC node, to provide ns-precision time-stamps (TSs) of input signals (e.g., triggers from a connected device) and transmission of these TSs to a central collection point. TiCkS was developed within the specifications of the Cherenkov Telescope Array (CTA) as one of the candidate TS nodes, with a small form-factor allowing its use in any CTA camera. The essential part of this development concerns the firmware in its Spartan-6 FPGA, with the addition of: 1) a 1ns-precision TDC for the TSs; 2) a UDP stack to transmit TSs and auxiliary information over the WR fibre, and to receive configuration & slow control commands over the same fibre. It also provides a 1-PPS and other clock signals to the connected device, from which it can receive auxiliary event-type information over an SPI link. A version of TiCkS with an FMC connector will be made available in the WR OpenHardware repository, so allowing the use of a mezzanine card with varied formats of input/output connectors, providing a cheap, flexible, and reliable solution for ns-precision time-stamping of trigger signals up to 200 kHz, for use in other experiments.  
poster icon Poster TUPHA090 [4.610 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA090  
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TUPHA091 A Reliable White Rabbit Network for the FAIR General Timing Machine 627
  • C. Prados, J.N. Bai, A. Hahn
    GSI, Darmstadt, Germany
  • A. Suresh. Suresh
    Hochschule Darmstadt, University of Applied Science, Darmstadt, Germany
  A new timing system based on White Rabbit (WR) is being developed for the upcoming FAIR facility at GSI in collaboration with CERN and other partners. The General Timing Machine (GTM) is responsible for the synchronization of nodes and distribution of timing events, which allows the real-time control of the accelerator equipment. WR is a time-deterministic, low latency Ethernet-based network for general data transfer and sub-ns time and frequency distribution. The FAIR WR network is considered operational only if it provides deterministic and resilient data delivery and reliable time distribution. In order to achieve this level of service, methods and techniques to increase the reliability of the GTM and WR network has been studied and evaluated. Besides, GSI has developed a network monitoring and logging system to measure the performance and detect failures of the WR network. Finally, we describe the continuous integration system at GSI and how it has improve the overall reliability of the GTM.  
poster icon Poster TUPHA091 [0.630 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA091  
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TUPHA092 Two Years of FAIR General Machine Timing - Experiences and Improvements 633
  • M. Kreider, R. Bär, D. Beck, A. Hahn, N. Kurz, C. Prados, S. Rauch, M. Reese, M. Zweig
    GSI, Darmstadt, Germany
  • M. Kreider
    Glyndŵr University, Wrexham, United Kingdom
  The FAIR General Machine Timing system has been in operation at GSI since 2015 and significant progress has been made in the last two years. The CRYRING accelerator was the first machine on campus operated with the new timing system and serves as a proving ground for new control system technology to this day. A White Rabbit (WR) network was set up, connecting parts of the existing facility. The Data Master was put under control of the LSA physics core. It was enhanced with a powerful schedule language and extensive research for delay bound analysis with network calculus was undertaken. Several form factors of Timing Receivers were improved, their hard and software now being in their second release and subject to a continuous series of automated long- and short-term tests in varying network scenarios. The final goal is time-synchronization of 2000-3000 nodes using the WR Precision-Time-Protocol distribution of TAI time stamps and synchronized command and control of FAIR equipment. Promising test results for scalability and accuracy were obtained when moving from temporary small lab setups to CRYRING's control system with more than 30 nodes connected over 3 layers of WR Switches.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA092  
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TUSH303 Managing your Timing System as a Standard Ethernet Network 1007
  • A. Wujek, G. Daniluk, M.M. Lipinski
    CERN, Geneva, Switzerland
  • A. Rubini
    GNUDD, Pavia, Italy
  White Rabbit (WR) is an extension of Ethernet which allows deterministic data delivery and remote synchronization of nodes with accuracies below 1 nanosecond and jitter better than 10 ps. Because WR is Ethernet, a WR-based timing system can benefit from all standard network protocols and tools available in the Ethernet ecosystem. This paper describes the configuration, monitoring and diagnostics of a WR network using standard tools. Using the Simple Network Management Protocol (SNMP), clients can easily monitor with standard monitoring tools like Nagios, Icinga and Grafana e.g. the quality of the data link and synchronization. The former involves e.g. the number of dropped frames; The latter concerns parameters such as the latency of frame distribution and fibre delay compensation. The Link Layer Discovery Protocol (LLDP) allows discovery of the actual topology of a network. Wireshark and PTP Track Hound can intercept and help with analysis of the content of WR frames of live traffic. In order to benefit from time-proven, scalable, standard monitoring solutions, some development was needed in the WR switch and nodes.  
poster icon Poster TUSH303 [1.608 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUSH303  
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THPHA084 Synchrotron Master Frequency Reconstruction for Sub-Nanosecond Time-Resolved XMCD-PEEM Experiments 1577
  • B. Molas, L. Aballe, M. Foerster, A. Fontsere Recuenco, O. Matilla, J. Moldes
    ALBA-CELLS Synchrotron, Cerdanyola del Vallès, Spain
  The timing and synchronization system at the ALBA synchrotron facility is based on the well-established event-based model broadly used in the particle accelerator facilities built in the last decade. In previous systems, based on signal model architecture, the master frequency was distributed using a direct analog signal and delayed at each target where the triggers were required. However, such strategy has proven to be extremely expensive and non-scalable. In the event-based model, the data stream is generated at a continuous rate, synchronously with the master clock oscillator of the accelerator. This strategy improves the flexibility for tuning the trigger parameters remotely and reduces the costs related to maintenance tasks. On the other hand, the absence of the pure RF signal distributed in the experimental stations implies much more complexity in the performance of time-resolved experiments. Abstract here explain how these difficulties have been overcome in the ALBA timing system in order to allow the signal reconstruction of the RF master frequency at the CIRCE beamline.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA084  
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THPHA085 SKA Synchronization and Timing Local Monitor Control - Project Status 1582
  • R. Warange, Y. Gupta
    National Centre for Radio Astrophysics, Tata Institute of Fundamental Research, Pune, India
  • R.E. Braddock, K. Grainge, J. Hammond
    University of Manchester, Manchester, United Kingdom
  • U.P. Horn
    SANReN, Pretoria, South Africa
  • G.R. Mant
    STFC/DL, Daresbury, Warrington, Cheshire, United Kingdom
  The Square Kilometre Array (SKA) project aims to build a large radio telescope consisting of multiple dishes and dipoles, in South Africa (SKA1-Mid) and Australia (SKA1-Low) respectively. The Synchronization and Timing (SAT) system of SKA provides frequency and clock signals from a central clock ensemble to all elements of the radio telescope, critical to the functionality of SKA acting as a unified large telescope using interferometry. The local monitor and control system for SAT (SAT. LMC) will monitor and control the working of the SAT system consisting of the timescale generation system, the frequency distribution system and the timing distribution system. SAT. LMC will also enable Telescope Manager (TM) to perform any SAT maintenance and operations. As part of Critical Design Review, SAT. LMC is getting close to submitting its final architecture and design. This paper discusses the architecture, technology, and the outcomes of prototyping activities.  
poster icon Poster THPHA085 [1.754 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA085  
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THPHA088 A Time Stamping TDC for SPEC and ZEN Platforms Based on White Rabbit 1587
  • M. Brückner
    PSI, Villigen PSI, Switzerland
  • R. Wischnewski
    DESY Zeuthen, Zeuthen, Germany
  Sub-nsec precision time synchronization is requested for data-acquisition components distributed over up to tens of km2 in modern astroparticle experiments, like upcoming Gamma-Ray and Cosmic-Ray detector arrays, to ensure optimal triggering, pattern recognition and background rejection. The White-Rabbit (WR) standard for precision time and frequency transfer is well suited for this purpose. We present two multi-channel general-purpose TDC units, which are firmware-implemented on two widely used WR-nodes: the SPEC (Spartan 6) and ZEN (Zynq) boards. Their main features: TDCs with 1 nsec resolution (default), running deadtime-free and capable of local buffering and centralized level-2 trigger architectures. The TDC stamps pulses are in absolute TAI. With off-the-shelve mezzanine boards (5ChDIO-FMC-boards), up to 5 TDC channels are available per WR-node. Higher density, customized simple I/O boards allow to turn this into 8 to 32-channel units, with an excellent price to performance ratio. The TDC units have shown excellent long-term performance in a harsh environment application at TAIGA-HiSCORE/Siberia, for the Front-End DAQ and the central GPSDO clock facility.  
poster icon Poster THPHA088 [2.880 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA088  
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THPHA090 Channel Selection Switch for the Redundant 1.3 GHz Master Oscillator of the European XFEL 1590
  • B. Gąsowski, K. Czuba, L.Z. Zembala
    Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
  • H. Schlarb
    DESY, Hamburg, Germany
  Funding: Research supported by Polish Ministry of Science and Higher Education, founds for international co-financed projects for years 2016 and 2017.
The phase reference signal reliability is of utmost importance for continuous operation of the European XFEL machine. Since even very short interruption or glitch in the reference signal might break the precise synchronisation between subsystems, it is desirable to minimize probability of such events. While master oscillators often have a hot-spare to speed-up recovery after a failure, whether switched manually or electronically, it does not save from time-consuming resynchronisation. Our experience from testing and commissioning E-XFEL 1.3 GHz Master Oscillator (MO) shows that a struggle to achieve demanding phase-noise requirements might negatively impact reliability of the system. In this paper we present an approach which allows for quick switching between independent reference generation channels while maintaining continuity of the output signal. This is a first step towards autonomous redundancy solution for the E-XFEL MO which will maintain continuous reference signal even in case of a failure of one of the generation channels.
poster icon Poster THPHA090 [1.155 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA090  
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THPHA092 Optimisation of a Low-Noise 1.3 GHz PLL Frequency Synthesizer for the European XFEL 1595
  • S. Hanasz, K. Czuba, B. Gąsowski, L.Z. Zembala
    Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
  • H. Schlarb
    DESY, Hamburg, Germany
  Funding: Research supported by Polish Ministry of Science and Higher Education, founds for international co-financed projects for year 2017.
The Master Oscillator system of the European XFEL was built using frequency synthesis techniques that were found to have the best phase noise performance. This includes low noise frequency multipliers and non­multiplying phase lock loops, incorporated in the system to shape its output phase noise spectrum. Jitter of the output signal strongly depends on phase noise transmittance of the PLL and suboptimal design can worsen it by orders of magnitude. Taking into consideration that the PLL open loop transmittance usually can be shaped in multiple ways, and that the accurate phase noise measurements can easily take more than 30 minutes, designing an automated tool becomes a necessity. For this purpose an approach to the tuning system construction was chosen in order to make the phase noise optimisation process simpler. This paper describes the optimisation of PLL synthesizer phase noise, done to improve the performance of the European XFEL MO. We present the phase noise optimisation process and achieved results.
poster icon Poster THPHA092 [1.393 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA092  
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